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Fiorentino, M., Savaria, Y., Thibeault, C., & Gervais, P. (mai 2016). A practical design method for prototyping self-timed processors using FPGAs [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2016), Montréal, Québec. Lien externe
Hasib, O. A.-T., Savaria, Y., & Thibeault, C. (avril 2016). WeSPer: a flexible small delay defect quality metric [Communication écrite]. 34th IEEE VLSI Test Symposium (VTS 2016), Las Vegas, Nevada (6 pages). Lien externe
Prieur, D., Granger, E., Savaria, Y., & Thibeault, C. (2016). Efficient identification of faces in video streams using low-power multi-core devices. Dans Handbook of pattern recognition and computer vision (5e éd.). Lien externe
Tazi, F. Z., Thibeault, C., & Savaria, Y. (mai 2016). Detailed analysis of radiation-induced delays on I/O blocks of an SRAM-based FPGA [Communication écrite]. IEEE Canadian Conference on Electrical and Computer Engineering (CCECE 2016), Vancouver, British Columbia (5 pages). Lien externe
