Documents publiés en "2009"

A

Aubertin, P., Mohammadi, H. M., Savaria, Y., & Langlois, J. M. P. (juin 2009). High performance ASIP implementation of PBDI: a new intra-field deinterlacing method [Communication écrite]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2009), Toulouse, France. Lien externe

Ayachi, D., Savaria, Y., & Thibeault, C. (juin 2009). A configurable platform for MPSoCs based on application specific instruction set processors [Communication écrite]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2009), Toulouse, France. Lien externe

B

Bafumba-Lokilo, D., Savaria, Y., & David, J. P. (octobre 2009). Generic array-based MPSoC architecture [Communication écrite]. 2nd Microsystems and Nanoelectronics Research Conference, Ottawa, Canada. Lien externe

Basile-Bellavance, Y., Blaquiere, Y., & Savaria, Y. (juin 2009). Faults diagnosis methodology for the WaferNet interconnection network [Communication écrite]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2009), Toulouse, France. Lien externe

Beucher, N., Belanger, N., Savaria, Y., & Bois, G. (2009). High acceleration for video processing applications using specialized instruction set based on parallelism and data reuse. Journal of Signal Processing Systems, 56(2-3), 155-165. Lien externe

H

Hasan, S. R., Pontikakis, B., & Savaria, Y. (mai 2009). An all-digital skew-adaptive clock scheduling algorithm for heterogeneous multiprocessor systems on chips (MPSoCs) [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2009), Taipei, Taiwan. Lien externe

Hashemi, S., Sawan, M., & Savaria, Y. (juin 2009). Fully-integrated low-voltage high-efficiency CMOS rectifier for wirelessly powered devices [Communication écrite]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2009), Toulouse, France. Lien externe

Hashemi, S., Sawan, M., & Savaria, Y. (décembre 2009). A low-area power-efficient CMOS active rectifier for wirelessly powered medical devices [Communication écrite]. 16th IEEE International Conference on Electronics, Circuits and Systems, Yasmine Hammamet, Tunisia. Lien externe

Hashemi, S., Sawan, M., & Savaria, Y. (2009). A novel low-drop CMOS active rectifier for RF-powered devices: Experimental results. Microelectronics Journal, 40(11), 1547-1554. Lien externe

L

Lacourse, A., Ducharme, M., St-Jean, H., Gagnon, Y., Savaria, Y., & Meunier, M. (2009). Tunable semiconductor component provided with a current barrier. (Brevet no US7564078). Lien externe

Lepercq, E., Blaquiere, Y., Norman, R., & Savaria, Y. (mai 2009). Workflow for an electronic configurable prototyping system [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2009), Taipei, Taiwan. Lien externe

Lepercq, E., Valorege, O., Basile-Bellavance, Y., Laflamme-Mayer, N., Blaquière, Y., & Savaria, Y. (octobre 2009). An interconnection network for a novel reconfigurable circuit board [Communication écrite]. 2nd Microsystems and Nanoelectronics Research Conference, Ottawa, Canada. Lien externe

M

Mahoney, P., Savaria, Y., Bois, G., & Plante, P. (2009). Performance characterization for the implementation of content addressable memories based on parallel hashing memories. Dans Transactions on High-Performance Embedded Architectures and Compilers. II (Vol. 5470, 307-325). Lien externe

Marche, D., Savaria, Y., & Gagnon, Y. (2009). An improved switch compensation technique for inverted R-2R Ladder DACs. IEEE Transactions on Circuits and Systems I: Regular Papers, 56(6), 1115-1124. Lien externe

N

Naderi, A., Sawan, M., & Savaria, Y. (2009). A low-power 2 GHz data conversion using delta modulation for portable application. Integration, the VLSI Journal, 42(1), 68-76. Lien externe

Naderi, A., Sawan, M., & Savaria, Y. (2009). Undersampling delta-sigma modulators : theory, design and implementation. Lien externe

T

Tanguay, L.-F., Sawan, M., & Savaria, Y. (2009). A very-high output impedance charge pump for low-voltage low-power PLLs. Microelectronics Journal, 40(6), 1026-1031. Lien externe

Z

Zarrabi, H., Al-Khalili, A. J., & Savaria, Y. (mai 2009). An interconnect-aware delay model for dynamic voltage scaling in nm technologies [Communication écrite]. 19th ACM Great Lakes Symposium on VLSI, Boston, MA, United states. Lien externe

Zarreabi, H., Al-Khalili, A. J., & Savaria, Y. (décembre 2009). Estimation of energy performance in computing platforms [Communication écrite]. 16th IEEE International Conference on Electronics, Circuits and Systems, Yasmine Hammamet, Tunisia. Lien externe