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Performance characterization for the implementation of content addressable memories based on parallel hashing memories

P. Mahoney, Yvon Savaria, Guy Bois and P. Plante

Book Section (2009)

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Department: Department of Computer Engineering and Software Engineering
Department of Electrical Engineering
PolyPublie URL: https://publications.polymtl.ca/19256/
Publisher: Springer
DOI: 10.1007/978-3-642-00904-4_16
Official URL: https://doi.org/10.1007/978-3-642-00904-4_16
Date Deposited: 18 Apr 2023 15:15
Last Modified: 29 Sep 2023 13:54
Cite in APA 7: Mahoney, P., Savaria, Y., Bois, G., & Plante, P. (2009). Performance characterization for the implementation of content addressable memories based on parallel hashing memories. In Transactions on High-Performance Embedded Architectures and Compilers. II (Vol. 5470, 307-325). https://doi.org/10.1007/978-3-642-00904-4_16

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