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Belanger, N., & Savaria, Y. (juin 2006). On the design of a double precision logarithmic number system arithmetic unit [Communication écrite]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Lien externe
Beucher, N., Belanger, N., Savaria, Y., & Bois, G. (octobre 2006). Motion Compensated Frame Rate Conversion Using a Specialized Instruction Set Processor [Communication écrite]. IEEE Workshop on Signal Processing Systems Design and Implementation, Banff, AB, Canada. Lien externe
Boyer, F.-R., Epassa, H. G., & Savaria, Y. (2006). Embedded power-aware cycle by cycle variable speed processor. IEE Proceedings. Computers and Digital Techniques, 153(4), 283-290. Lien externe
Bui, H. T., & Savaria, Y. (avril 2006). High speed differential pulse-width control loop based on frequency-to-voltage converters [Communication écrite]. 16th ACM Great Lakes Symposium on VLSI (GLSVLSI 2006), Philadelphia, USA. Lien externe
Cantin, M.-A., Savaria, Y., Prodanos, D., & Lavoie, P. (2006). A metric for automatic word-length determination of hardware datapaths. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(10), 2228-31. Lien externe
Castonguay, A., & Savaria, Y. (mai 2006). Architecture of a hypertransport tunnel [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece. Lien externe
Chureau, A., Savaria, Y., Boland, J.-F., Zilic, Z., Thibeault, C., & Gagnon, F. (juin 2006). Building heterogeneous functional prototypes using articulated interfaces [Communication écrite]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Lien externe
Deslauriers, F., Langevin, M., Bois, G., Savaria, Y., & Paulin, P. (juin 2006). RoC: a scalable network on chip based on the token ring concept [Communication écrite]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Lien externe
Dubois, M., Savaria, Y., Haccoun, D., & Belanger, N. (2006). Low-power configurable and generic shift register hardware realisations for convolutional encoders and decoders. IEE Proceedings. Circuits, Devices and Systems, 153(3), 207-213. Lien externe
El fouladi, J., André, W., Savaria, Y., & Martel, S. (août 2006). System design of an integrated measurement electronic subsystem for bacteria detection using and electrode array and MC-1 magnetotactic bacteria [Communication écrite]. International Workshop on Computer Architecture for Machine Perception and Sensing (CAMP 2006), Montréal, Québec. Lien externe
Hashemi, S., Sawan, M., & Savaria, Y. (mai 2006). A power planning model for implantable stimulators [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece. Lien externe
Huang, Z., Savaria, Y., Sawan, M., & Meinga, R. (mai 2006). High-voltage operational amplifier based on dual floating-gate transistors [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece. Lien externe
Ignat, N., Nicolescu, B., Savaria, Y., & Nicolescu, G. Soft-Error Classification and Impact Analysis on Real-Time Operating Systems [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2006). Lien externe
Mahvash, M. H., Savaria, Y., & Langlois, J. M. P. (juin 2006). Real-time ELA de-interlacing with the Xtensa reconfigurable processor [Communication écrite]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. Lien externe
Mbaye, M., Lebel, D., Belanger, N., Savaria, Y., & Pierre, S. (mai 2006). Design exploration with an application-specific instruction-set processor for ELA deinterlacing [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece. Lien externe
Mohammadi, H. M., Langlois, J. M. P., & Savaria, Y. (décembre 2006). A threshold-based deinterlacing algorithm using motion compensation and directional interpolation [Communication écrite]. 13th IEEE International Conference on Electronics, Circuits and Systems, Nice, France. Lien externe
Naderi, A., Sawan, M., & Savaria, Y. (mai 2006). Design of an active-RC bandpass filter for a subsampling RF delta modulator [Communication écrite]. Canadian Conference on Electrical and Computer Engineering (CCECE 2006), Ottawa, ON, Canada. Lien externe
Naderi, A., Sawan, M., & Savaria, Y. (mai 2006). A novel 2-GHz band-pass delta modulator dedicated to wireless receivers [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece. Lien externe
Nicolescu, B., Ignat, N., Savaria, Y., & Nicolescu, G. (2006). Analysis of real-time systems sensitivity to transient faults using MicroC kernel. IEEE Transactions on Nuclear Science, 53(4), 1902-1909. Lien externe
Pontikakis, B., Boyer, F.-R., & Savaria, Y. (mai 2006). A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Island of Kos, Greece. Lien externe
Sawan, M., Harvey, J.-F., Roy, M., Coulombe, J., Savaria, Y., & Donfack, C. (2006). Body electronic implant and artificial vision system thereof. (Brevet no US7027874). Lien externe
Trabelsi, A., Boyer, F.-R., & Savaria, Y. (2006). On the application of minimum noise tracking to cancel cosine shaped residual noise. (Rapport technique n° EPM-RT-2006-09). Disponible
