Items published in "2005"

E

Epassa, H. G., Boyer, F.-R., & Savaria, Y. (2005, May). Implementation of a Cycle by Cycle Variable Speed Processor [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2005), Kobe, Japan. External link

P

Pontikakis, B., Boyer, F.-R., & Savaria, Y. (2005, July). Performance Improvement of Configurable Processor Architectures Using a Variable Clock Period [Paper]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005), Banff, Alberta, Canada. External link