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Collaboration networkThis graph maps the connections between all the collaborators of {}'s publications listed on this page.
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Antaki, B., Patenaude, S., Trognon, L., & Savaria, Y. (1997, June). Study on split-output TSPC CMOS circuits [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 1997), Hong Kong, Hong Kong. External link
Monté-Genest, G., Antaki, B., Patenaude, S., Savaria, Y., Thibeault, C., & Trouborst, P. (2001, April). Tools for the characterization of bipolar CML testability [Paper]. 19th IEEE VLSI Test Symposium (VTS 2001), Marina Del Rey, CA, USA. External link
Patenaude, S. (1998). Modélisation de pannes dans les circuits logiques bipolaires en mode courant et méthodes de test adaptées [Master's thesis, École Polytechnique de Montréal]. Unavailable
