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Items where Author is "Chao, Chen"

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Number of items: 3.

A

Anwar, H., Chao, C., & Beltrame, G. (2015, June). A probabilistically analysable cache implementation on FPGA [Paper]. 13th IEEE International New Circuits and Systems Conference (NEWCAS 2015), Grenoble, France (4 pages). External link

C

Chao, C., Panerati, J., Hafnaoui, I., & Beltrame, G. (2017, June). Static probabilistic timing analysis with a permanent fault detection mechanism [Paper]. 12th IEEE International Symposium on Industrial Embedded Systems (SIES 2017), Toulouse, France (10 pages). External link

Chao, C., Panerati, J., & Beltrame, G. (2016, September). Effects of online fault detection mechanisms on Probabilistic Timing Analysis [Paper]. IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2016), Connecticut. External link

List generated on: Fri Dec 5 08:01:37 2025 EST