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Circuit techniques for low-voltage deep submicron CMOS analog-to-digital converters

Christian Jésus Bayodé Fayomi

PhD thesis (2003)

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Cite this document: Fayomi, C. J. B. (2003). Circuit techniques for low-voltage deep submicron CMOS analog-to-digital converters (PhD thesis, École Polytechnique de Montréal). Retrieved from https://publications.polymtl.ca/7169/
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Abstract

Motivation -- Resarch objectives and methodologies -- Research contributins and organization of the thesis -- Low-voltage CMOS anaog circuits and reliability -- Low-voltage analog circuits in deep submicron CMOS : a review -- CMOS bandgap reference circuits -- Other low-voltage technique and analog building blocks -- Reliabe circuit techniques for low-voltage techniques and analg building blocks -- Reliable implementation of a mos switch-based sample-and hold circuits -- Analog CMOs switches -- Low-voltage analog switch in deep submicron CMOS : design technique and subsequent measurement -- Low-voltage techniques and other analog building bocks in deep submicron CMOS -- Low-voltage rail-to-rail input3output opamp deign -- Low-voltage rail-to-rail input analog comparator design -- Low-voltage rail-to-rail successive approximation ADC -- Technology and test setpu -- Exppermiental results of the boostrapped swich based sample-and-hold.

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Additional Information: Le fichier PDF de ce document a été produit par Bibliothèque et Archives Canada selon les termes du programme Thèses Canada https://canada.on.worldcat.org/oclc/57339321
Department: Département de génie électrique
Date Deposited: 04 Aug 2021 11:05
Last Modified: 25 Aug 2021 14:57
PolyPublie URL: https://publications.polymtl.ca/7169/

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