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Reuse and automatic generation of testbenches for effective hardware verifiction

Jiahong Wang

Masters thesis (2003)

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Cite this document: Wang, J. (2003). Reuse and automatic generation of testbenches for effective hardware verifiction (Masters thesis, École Polytechnique de Montréal). Retrieved from https://publications.polymtl.ca/7000/
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Abstract

Overview of functional verification -- Terminology : verification, formal verification and functional verification -- The key components needed to perform functional verification -- Functional verification approaches -- Hardware verification language (HVL) -- Functional verification problems targeted -- Reusable testbench -- Testbench reuse -- Functional abstraction and testbench reuse -- Reusable testbench generation methodology -- System functionality capture based on SDL -- Methodology for building reusable testbenches -- Features of the methodology -- Implementation of the methodology -- Features of the tool -- Rule technique -- Design of the generatin tool set RTGT.

Open Access document in PolyPublie
Additional Information: Le fichier PDF de ce document a été produit par Bibliothèque et Archives Canada selon les termes du programme Thèses Canada https://canada.on.worldcat.org/oclc/55510414
Department: Département de génie informatique et génie logiciel
Date Deposited: 04 Aug 2021 11:05
Last Modified: 25 Aug 2021 14:57
PolyPublie URL: https://publications.polymtl.ca/7000/

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