Improved High-Radix Carry-Save Adders for Low-Latency Vector Reduction on FPGA

Fahimeh Hajizadeh, Paul-André Bisson, Tarek Ould-Bachir and Jean Pierre David

Paper (2025)

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Department:	Department of Electrical Engineering
ISBN:	9798331532567
PolyPublie URL:	https://publications.polymtl.ca/67703/
Conference Title:	23rd IEEE Interregional NEWCAS Conference (NEWCAS 2025)
Conference Location:	Paris, France
Conference Date(s):	2025-06-22 - 2025-06-25
Publisher:	Institute of Electrical and Electronics Engineers
DOI:	10.1109/newcas64648.2025.11107040
Official URL:	https://doi.org/10.1109/newcas64648.2025.11107040
Date Deposited:	19 Aug 2025 13:56
Last Modified:	19 Aug 2025 13:56

Cite in APA 7:	Hajizadeh, F., Bisson, P.-A., Ould-Bachir, T., & David, J. P. (2025, June). Improved High-Radix Carry-Save Adders for Low-Latency Vector Reduction on FPGA [Paper]. 23rd IEEE Interregional NEWCAS Conference (NEWCAS 2025), Paris, France. https://doi.org/10.1109/newcas64648.2025.11107040
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