Self-aligned insulated gate FET technology for InP : an interface engineering approach

Chetlur S. Sundararaman

Ph.D. thesis (1993)

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Additional Information:	Thèse (Ph. D.) École polytechnique (Montréal, Québec)
Department:	Department of Engineering Physics
PolyPublie URL:	https://publications.polymtl.ca/57987/
Institution:	Polytechnique Montréal
Date Deposited:	03 Apr 2024 15:40
Last Modified:	01 Oct 2024 00:11

Cite in APA 7:	Sundararaman, C. S. (1993). Self-aligned insulated gate FET technology for InP : an interface engineering approach [Ph.D. thesis, Polytechnique Montréal]. PolyPublie. https://publications.polymtl.ca/57987/
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