A Small Footprint Digital Isolator based on CMOS Integrated Hall-effect Sensor

Seyed Sepehr Mirfakhraei, Yves Audet, Ahmad Hassan, Mohamad Sawan

Article de revue (2022)

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Résumé

—Digital isolators have been widely used to protect low voltage electronics as well as human safety from high voltage surges. However, conventional isolation links occupy large chip areas. In this article, a novel small-size on-chip digital isolator for medium-bitrate application based on a CMOS integrated Hall-effect sensor is reported. With the proposed approach, the area of the transmitter coil is reduced to lower than 50% of conventional transformers. The architecture reduces the chip area in isolation amplifiers, power control units, DC-DC converters, and clock recovery circuits. It allows the integration of multichannel isolators using two custom integrated circuits with no post-processing. The tested prototype achieves a data transfer rate of 20 Mbps with above 12 kV/μs of common-mode transient immunity (CMTI). It has 900 V of continuous isolation working voltage, 27 ns propagation delay, and consumes 2.3 mA of static current.

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Renseignements supplémentaires:
Publié en ligne le 2021-11-16.
Organismes subventionnaires:
CRSNG/NSERC, MITACS, Canadian Microelectronics Corporation (CMC) Microsystems
Adresse URL de PolyPublie:
Titre de la revue :
IEEE Sensors Journal ( vol. 22 , no 1 )
Maison d'édition:
IEEE
OAI:
oai:publications.polymtl.ca:49881
ORCID
Date du dépôt:
18 avr. 2023 14:59
Dernière modification:
14 oct. 2026 14:05
Citer en APA 7:
Mirfakhraei, S. S., Audet, Y., Hassan, A., & Sawan, M. (2022). A Small Footprint Digital Isolator based on CMOS Integrated Hall-effect Sensor. IEEE Sensors Journal, 22(1), 412-418. https://doi.org/10.1109/jsen.2021.3128573

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