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Protocoles de communication : modélisation en VHDL (VHSIC Hardware Description Language) pour la synthèse de haut niveau

Ali Assi

Master's thesis (1994)

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Additional Information: Nom historique du département: Département de génie électrique et de génie informatique
Department: Department of Electrical Engineering
Department of Computer Engineering and Software Engineering
Academic/Research Directors: Bozena Kaminska
PolyPublie URL: https://publications.polymtl.ca/33598/
Institution: École Polytechnique de Montréal
Date Deposited: 18 Apr 2023 15:25
Last Modified: 25 Sep 2024 16:16
Cite in APA 7: Assi, A. (1994). Protocoles de communication : modélisation en VHDL (VHSIC Hardware Description Language) pour la synthèse de haut niveau [Master's thesis, École Polytechnique de Montréal].

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