H. BenHamida and Bozena Kaminska
Paper (1994)
An external link is available for this itemAdditional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
ISBN: | 078031915X |
PolyPublie URL: | https://publications.polymtl.ca/33546/ |
Conference Title: | IEEE International Symposium on Circuits and Systems - ISCAS '94 |
Conference Location: | London, UK |
Conference Date(s): | 1994-05-30 - 1994-06-02 |
Publisher: | IEEE |
DOI: | 10.1109/iscas.1994.408756 |
Official URL: | https://doi.org/10.1109/iscas.1994.408756 |
Date Deposited: | 18 Apr 2023 15:25 |
Last Modified: | 25 Sep 2024 16:16 |
Cite in APA 7: | BenHamida, H., & Kaminska, B. (1994, May). High level synthesis with testability constraints [Paper]. IEEE International Symposium on Circuits and Systems - ISCAS '94, London, UK. https://doi.org/10.1109/iscas.1994.408756 |
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