Mounir Fares and Bożena Kamińska
Paper (1994)
An external link is available for this item| Additional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/31326/ |
| Conference Title: | 1994 3rd International Conference on the Economics of Design, Test, and Manufacturing |
| Conference Location: | Austin, TX, USA |
| Conference Date(s): | 1994-05-16 - 1994-05-17 |
| Publisher: | Institute of Electrical and Electronics Engineers |
| DOI: | 10.1109/icedtm.1994.496097 |
| Official URL: | https://doi.org/10.1109/icedtm.1994.496097 |
| Date Deposited: | 18 Apr 2023 15:24 |
| Last Modified: | 14 Apr 2026 10:33 |
| Cite in APA 7: | Fares, M., & Kamińska, B. (1994, May). Test strategy selection for multi-chip systems [Paper]. 1994 3rd International Conference on the Economics of Design, Test, and Manufacturing, Austin, TX, USA. https://doi.org/10.1109/icedtm.1994.496097 |
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