M. Shaditalab, Guy Bois
, Mohamad Sawan, K. L. Pocek and J. M. Arnold
Paper (1998)
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| Additional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
|---|---|
| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| ISBN: | 0818689005 |
| PolyPublie URL: | https://publications.polymtl.ca/29332/ |
| Conference Title: | IEEE Symposium on FPGAs for Custom Computing Machines |
| Conference Location: | Napa Valley, CA |
| Conference Date(s): | 1998-04-15 - 1998-04-17 |
| Publisher: | IEEE Comput. Soc |
| DOI: | 10.1109/fpga.1998.707943 |
| Official URL: | https://doi.org/10.1109/fpga.1998.707943 |
| Date Deposited: | 18 Apr 2023 15:23 |
| Last Modified: | 08 Apr 2025 02:19 |
| Cite in APA 7: | Shaditalab, M., Bois, G., Sawan, M., Pocek, K. L., & Arnold, J. M. (1998, April). Self-sorting radix-2 FFT on FPGAs using parallel pipelined distributed arithmetic blocks [Paper]. IEEE Symposium on FPGAs for Custom Computing Machines, Napa Valley, CA. https://doi.org/10.1109/fpga.1998.707943 |
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