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Design for testability method for CML digital circuits

B. Antaki, Yvon Savaria, A. Saman, N. Xiong, D. Borrione and R. Ernst

Paper (1999)

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Additional Information: Nom historique du département: Département de génie électrique et de génie informatique
Department: Department of Electrical Engineering
Department of Computer Engineering and Software Engineering
PolyPublie URL: https://publications.polymtl.ca/29177/
Conference Title: Design, Automation and Test in Europe Conference and Exhibition (DATE 1999)
Conference Location: Munich, Germany
Conference Date(s): 1999-03-09 - 1999-03-12
Publisher: IEEE Comput. Soc
DOI: 10.1109/date.1999.761146
Official URL: https://doi.org/10.1109/date.1999.761146
Date Deposited: 18 Apr 2023 15:22
Last Modified: 05 Apr 2024 11:17
Cite in APA 7: Antaki, B., Savaria, Y., Saman, A., Xiong, N., Borrione, D., & Ernst, R. (1999, March). Design for testability method for CML digital circuits [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 1999), Munich, Germany. https://doi.org/10.1109/date.1999.761146

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