Y. Fouzar, Mohamad Sawan and Yvon Savaria
Paper (2000)
An external link is available for this itemAdditional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
PolyPublie URL: | https://publications.polymtl.ca/28186/ |
Conference Title: | IEEE International Symposium on Circuits and Systems (ISCAS 2000) |
Conference Location: | Geneva, Switzerland |
Conference Date(s): | 2000-05-28 - 2000-05-31 |
Publisher: | Presses Polytech. Univ. Romandes |
DOI: | 10.1109/iscas.2000.856309 |
Official URL: | https://doi.org/10.1109/iscas.2000.856309 |
Date Deposited: | 18 Apr 2023 15:21 |
Last Modified: | 25 Sep 2024 16:09 |
Cite in APA 7: | Fouzar, Y., Sawan, M., & Savaria, Y. (2000, May). A new fully integrated CMOS phase-locked loop with low jitter and fast lock time [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland. https://doi.org/10.1109/iscas.2000.856309 |
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