P. Vado, Yvon Savaria
, Y. Zoccarato and C. Robach
Paper (2000)
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| Additional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
|---|---|
| Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
| PolyPublie URL: | https://publications.polymtl.ca/27772/ |
| Conference Title: | IEEE International Symposium on Circuits and Systems (ISCAS 2000) |
| Conference Location: | Geneva, Switzerland |
| Conference Date(s): | 2000-05-28 - 2000-05-31 |
| Publisher: | Presses Polytech. Univ. Romandes |
| DOI: | 10.1109/iscas.2000.857100 |
| Official URL: | https://doi.org/10.1109/iscas.2000.857100 |
| Date Deposited: | 18 Apr 2023 15:22 |
| Last Modified: | 25 Sep 2024 16:08 |
| Cite in APA 7: | Vado, P., Savaria, Y., Zoccarato, Y., & Robach, C. (2000, May). A methodology for validating digital circuits with mutation testing [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland. https://doi.org/10.1109/iscas.2000.857100 |
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