Falah R. Awwad, Mohamed Nekili, Venkatanarayama Ramachandran and Mohamad Sawan
Article (2008)
An external link is available for this item| Department: | Department of Electrical Engineering |
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| Research Center: | Polystim - Neurotechnology Laboratory |
| PolyPublie URL: | https://publications.polymtl.ca/21165/ |
| Journal Title: | IEEE Transactions on Circuits and Systems I: Regular Papers (vol. 55, no. 1) |
| Publisher: | IEEE |
| DOI: | 10.1109/tcsi.2007.910538 |
| Official URL: | https://doi.org/10.1109/tcsi.2007.910538 |
| Date Deposited: | 18 Apr 2023 15:15 |
| Last Modified: | 08 Apr 2025 02:08 |
| Cite in APA 7: | Awwad, F. R., Nekili, M., Ramachandran, V., & Sawan, M. (2008). On modeling of parallel repeater-insertion methodologies for SoC interconnects. IEEE Transactions on Circuits and Systems I: Regular Papers, 55(1), 322-335. https://doi.org/10.1109/tcsi.2007.910538 |
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