Documents publiés en "2025"

Abbasmollaei, M. (2025). FPGA-Friendly Programmable Data Plane: A Transition from P4 Semantics to Pipeline Implementations via High-Level Synthesis Approaches [Thèse de doctorat, Polytechnique Montréal]. Disponible

Abbasmollaei, M., Ould-Bachir, T., & Savaria, Y. (2025). HLSCAM: Fine-tuned HLS-based content addressable memory implementation for packet processing on FPGA. Electronics, 14(9), 1765 (22 pages). Disponible

Abbasmollaei, M., Ould-Bachir, T., & Savaria, Y. (2025). P4THLS: A Templated HLS Framework to Automate Efficient Mapping of P4 Data-Plane Applications to FPGAs. IEEE Access. Lien externe

Abbasmollaei, M., Ould-Bachir, T., & Savaria, Y. (2025). A Stateful Extension to P4THLS for Advanced Telemetry and Flow Control. Future Internet, 17(11), 530 (21 pages). Lien externe