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Items published in "2005"

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Ali, S. M., Raut, R., & Sawan, M. (2005, July). A power efficient decoder for 2GHz, 6-bit CMOS Flash-ADC architecture [Paper]. 5th International Workshop on System on Chip for Real-Time Applications (IWSOC 2005). External link

List generated on: Tue Apr 16 05:16:37 2024 EDT