Documents publiés en "2000"

A

Adham, S. M. I., Savaria, Y., Antaki, B., & Xiong, N. (2000). Voltage excursion detection apparatus. (Brevet no US6100716). Lien externe

B

Boyer, F.-R., Aboulhamid, E. M., & Savaria, Y. (janvier 2000). Efficient verification method for a class of multi-phase sequential circuits [Communication écrite]. 7th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2000). Lien externe

C

Calbaza, D. E., & Savaria, Y. (mai 2000). Direct digital frequency synthesis of low-jitter clocks [Communication écrite]. IEEE Custom Integrated Circuits Conference, Orlando, FL, USA. Lien externe

Calbaza, D. E., & Savaria, Y. (octobre 2000). A direct digitally delay generator [Communication écrite]. 23rd International Semiconductor Conference (CAS 2000), Sinaia, Romania. Lien externe

Calbaza, D. E., & Savaria, Y. (janvier 2000). Jitter model of direct digital synthesis clock generators [Communication écrite]. TCAS-I 2000. Non disponible

Cantin, M.-A., Blaquière, Y., Savaria, Y., Lavoie, P., & Granger, É. (mai 2000). Analysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland. Lien externe

D

Donfack, C., Sawan, M., & Savaria, Y. (janvier 2000). Fully integrated AC impedance measurement technique for implantable electrical stimulation applications [Communication écrite]. 5th Annual Conference of the International Functional Electrical Stimulation Society (IFESS 2000), Denmark. Non disponible

Donfack, C., Sawan, M., & Savaria, Y. (2000). Implantable Measurement Technique Dedicated to the Monitoring of Electrode-Nerve Contact in Bladder Stimulators. Medical & Biological Engineering & Computing, 38(4), 465-468. Lien externe

Donfack, C., Sawan, M., & Savaria, Y. (janvier 2000). Techniques de caractérisation de l'interface électrode-tissus [Communication écrite]. 2nd Symposium on Advanced Biomaterials (ISAB 2000), Montréal, Québec. Non disponible

F

Fouzar, Y., Sawan, M., & Savaria, Y. CMOS Wide-Swing Differential VCO for Fully Integrated Fast PLL [Communication écrite]. 43rd IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2000). Lien externe

Fouzar, Y., Sawan, M., & Savaria, Y. (mai 2000). A new fully integrated CMOS phase-locked loop with low jitter and fast lock time [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland. Lien externe

Fouzar, Y., Sawan, M., & Savaria, Y. (décembre 2000). Very short locking time PLL based on controlled gain technique [Communication écrite]. 7th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2000), Jounieh, Lebanon. Lien externe

H

Hébert, O., Kraljic, I. C., & Savaria, Y. (mai 2000). A method to derive application-specific embedded processing cores [Communication écrite]. 8th International Workshop on Hardware/Software Codesign (CODES 2000), San Diego, CA, USA. Lien externe

N

Nsame, P., Grou-Szabo, R., & Savaria, Y. (janvier 2000). INTIME: a multi-tool specification environment for ensuring timing constraints integrity for SOC design [Communication écrite]. IP Based Design 2000, Grenoble, France. Lien externe

P

Planque, F., Kraljic, I. C., & Savaria, Y. (septembre 2000). Mapping irregular algorithms in a custom computing image processing framework [Communication écrite]. 3rd Annual Military and Aerospace Applications of Programmable Devices and Technologies International Conference (MAPLD 2000), Laurel, Maryland. Non disponible

V

Vado, P., Savaria, Y., Zoccarato, Y., & Robach, C. (mai 2000). A methodology for validating digital circuits with mutation testing [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2000), Geneva, Switzerland. Lien externe