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Nekili, M., Savaria, Y., Bois, G., Bayoumi, M. A., & Jullien, G. (février 1998). Design of clock distribution networks in presence of process variations [Communication écrite]. 8th Great Lakes Symposium on VLSI, Lafayette, LA, USA. Lien externe
Shaditalab, M., Bois, G., Sawan, M., Pocek, K. L., & Arnold, J. M. (avril 1998). Self-sorting radix-2 FFT on FPGAs using parallel pipelined distributed arithmetic blocks [Communication écrite]. IEEE Symposium on FPGAs for Custom Computing Machines, Napa Valley, CA. Lien externe
