Mohamed Nekili, Yvon Savaria, Guy Bois, M. A. Bayoumi and G. Jullien
Paper (1998)
An external link is available for this itemAdditional Information: | Nom historique du département: Département de génie électrique et de génie informatique |
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Department: |
Department of Electrical Engineering Department of Computer Engineering and Software Engineering |
PolyPublie URL: | https://publications.polymtl.ca/29465/ |
Conference Title: | 8th Great Lakes Symposium on VLSI |
Conference Location: | Lafayette, LA, USA |
Conference Date(s): | 1998-02-19 - 1998-02-21 |
Publisher: | IEEE Comput. Soc |
DOI: | 10.1109/glsv.1998.665206 |
Official URL: | https://doi.org/10.1109/glsv.1998.665206 |
Date Deposited: | 18 Apr 2023 15:23 |
Last Modified: | 25 Sep 2024 16:10 |
Cite in APA 7: | Nekili, M., Savaria, Y., Bois, G., Bayoumi, M. A., & Jullien, G. (1998, February). Design of clock distribution networks in presence of process variations [Paper]. 8th Great Lakes Symposium on VLSI, Lafayette, LA, USA. https://doi.org/10.1109/glsv.1998.665206 |
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