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Bois, G., Bosi, B., & Savaria, Y. (janvier 1997). High performance reconfigurable coprocessor for digital signal processing [Communication écrite]. 14th Annual International Conference of the Mentor Graphics Users' Group, Portland, Oregon. Non disponible
Nekili, M., Bois, G., & Savaria, Y. (1997). Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 5(2), 161-174. Lien externe
Pera, F., Savaria, Y., & Bois, G. (juin 1997). Time delay measurement methods for integrated transmission lines and high speed cells characterization [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 1997), Hong Kong, Hong Kong. Lien externe
Bois, G., Bosi, B., & Savaria, Y. (janvier 1997). High performance reconfigurable coprocessor for digital signal processing [Communication écrite]. 14th Annual International Conference of the Mentor Graphics Users' Group, Portland, Oregon. Non disponible
Nekili, M., Bois, G., & Savaria, Y. (1997). Pipelined H-trees for high-speed clocking of large integrated systems in presence of process variations. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 5(2), 161-174. Lien externe
Pera, F., Savaria, Y., & Bois, G. (juin 1997). Time delay measurement methods for integrated transmission lines and high speed cells characterization [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 1997), Hong Kong, Hong Kong. Lien externe