 | Monter d'un niveau |
Dagenais, M. (1991). Efficient algorithmic decomposition of transistor groups into series, bridge, and parallel combinations. IEEE Transactions on Circuits and Systems, 38(6), 569-581. Lien externe
Rumin, N. C., Dagenais, M., & Zhang, W. (juin 1991). Transistor-level CMOS gate models for timing analysis and simulation [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 1991), Singapore. Publié dans 1991 IEEE International Symposium on Circuits and Systems (ISCAS). Lien externe
