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Campi, F., Castello, R., Cesura, G., Guerrieri, R., Lavagno, L., Lodi, A., Malcovati, P., & Toma, M. (2006). Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals. IEEE Circuits and Systems Magazine, 6(1), 8-26. Lien externe
Lodi, A., Toma, M., Campi, F., Cappelli, A., Canegallo, R., & Guerrieri, R. (2003). A VLIW processor with reconfigurable instruction set for embedded applications. IEEE Journal of Solid-State Circuits, 38(11), 1876-1886. Lien externe
Mucci, C., Vanzolini, L., Lodi, A., Deledda, A., Guerrieri, R., Campi, F., & Toma, M. (avril 2007). Implementation of AES/Rijndael on a dynamically reconfigurable architecture [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2007), Nice Acropolis, France. Lien externe
Mucci, C., Bocchi, M., Gagliardi, P., Ciccarelli, L., Lodi, A., Toma, M., & Campi, F. (mai 2006). A case-study on multimedia applications for the XiRisc reconfigurable processor [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Kos, Greece. Lien externe
Bocchi, M., De Dominicis, M., Mucci, C., Deledda, A., Campi, F., Lodi, A., Toma, M., & Guerrieri, R. (septembre 2006). Design and implementation of a reconfigurable heterogeneous multiprocessor SoC [Communication écrite]. IEEE Custom Integrated Circuits Conference (CICC 2006), San Jose, CA, United states. Lien externe
Lodi, A., Ciccarelli, L., Mucci, C., Giansante, R., Cappelli, A., & Toma, M. (avril 2005). An embedded reconfigurable datapath for SoC [Communication écrite]. 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), Napa, CA, United states. Lien externe
Cappelli, A., Lodi, A., Bocchi, M., Mucci, C., Innocenti, M., De, B. C., Ciccarelli, L., Giansante, R., Deledda, A., Campi, F., Toma, M., & Guerrieri, R. (février 2005). XiSystem: A XiRisc-based SoC with a reconfigurable IO module [Communication écrite]. IEEE International Solid-State Circuits Conference (ISSCC 2005), San Francisco, CA, United states. Lien externe
Cappelli, A., Lodi, A., Mucci, C., Toma, M., & Campi, F. (avril 2004). A dataflow control unit for C-to-configurable pipelines compilation flow [Communication écrite]. 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), Napa, CA, United states. Lien externe
Lodi, A., Giansante, R., Chiesa, C., Ciccarelli, L., Toma, M., & Campi, F. (février 2004). Routing architecture for multi-context FPGAs [Communication écrite]. 12th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2004), Monterey, CA, USA. Lien externe
Bocchi, M., De Bartolomeis, C., Mucci, C., Campi, F., Lodi, A., Toma, M., Canegallo, R., & Guerrieri, R. (octobre 2004). A XiRisc-based SoC for embedded DSP applications [Communication écrite]. IEEE Custom Integrated Circuits Conference (CICC 2004), Orlando, FL, United states. Lien externe
Mucci, C., Chiesa, C., Lodi, A., Toma, M., & Campi, F. (novembre 2003). A C-based algorithm development flow for a reconfigurable processor architecture [Communication écrite]. 5th International Symposium on System-on-Chip (SoC 2003), Tampere, Finland. Lien externe
Lodi, A., Ciccarelli, L., Cappelli, A., Campi, F., & Toma, M. (février 2003). Decoder-based multi-context interconnect architecture [Communication écrite]. IEEE Computer Society Annual Symposium on VLSI: New Trends and Technologies for Vlsi Systems Design (ISVLSI 2003), Tampa, FL, United states. Lien externe
Lodi, A., Chiesa, C., Campi, F., & Toma, M. (mai 2003). A flexible LUT-based carry chain for FPGAs [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand. Lien externe
Lodi, A., Toma, M., & Campi, F. (février 2003). A pipelined configurable gate array for embedded processors [Communication écrite]. 11th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2003), Monterey, CA, United states. Lien externe
Campi, F., Toma, M., Lodi, A., Cappelli, A., Canegallo, R., & Guerrieri, R. (février 2003). A VLIW processor with reconfigurable instruction set for embedded applications [Communication écrite]. IEEE International Solid-State Circuits Conference (ISSCC 2003), San Francisco, CA, USA. Lien externe
Lodi, A., Toma, M., & Guerrieri, R. (mai 2002). Very low complexity prompted speaker verification system based on HMM-modeling [Communication écrite]. IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2002), Orlando, FL, United states. Lien externe
Toma, M., Lodi, A., & Guerrieri, R. (septembre 2002). Word endpoints detection in the presence of non-stationary noise [Communication écrite]. 7th International Conference on Spoken Language Processing (ICSLP-INTERSPEECH 2002), Denver, Colorado, USA. Lien externe
Ciccarelli, L., Chiesa, C., Lodi, A., Giansante, R., Toma, M., & Campi, F. (2008). Switch block and corresponding switch matrix, in particular for FPGA architectures. (Brevet no US7463055). Lien externe
Cappelli, A., Ciccarelli, L., Lodi, A., Toma, M., & Campi, F. (2007). Architecture for a connection block in reconfigurable gate arrays. (Brevet no US7193437). Lien externe
