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Items where Author is "Toma, Mario"

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Number of items: 19.

B

Bocchi, M., De Dominicis, M., Mucci, C., Deledda, A., Campi, F., Lodi, A., Toma, M., & Guerrieri, R. (2006, September). Design and implementation of a reconfigurable heterogeneous multiprocessor SoC [Paper]. IEEE Custom Integrated Circuits Conference (CICC 2006), San Jose, CA, United states. External link

Bocchi, M., De Bartolomeis, C., Mucci, C., Campi, F., Lodi, A., Toma, M., Canegallo, R., & Guerrieri, R. (2004, October). A XiRisc-based SoC for embedded DSP applications [Paper]. IEEE Custom Integrated Circuits Conference (CICC 2004), Orlando, FL, United states. External link

C

Ciccarelli, L., Chiesa, C., Lodi, A., Giansante, R., Toma, M., & Campi, F. (2008). Switch block and corresponding switch matrix, in particular for FPGA architectures. (Patent no. US7463055). External link

Cappelli, A., Ciccarelli, L., Lodi, A., Toma, M., & Campi, F. (2007). Architecture for a connection block in reconfigurable gate arrays. (Patent no. US7193437). External link

Campi, F., Castello, R., Cesura, G., Guerrieri, R., Lavagno, L., Lodi, A., Malcovati, P., & Toma, M. (2006). Baseband analog front-end and digital back-end for reconfigurable multi-standard terminals. IEEE Circuits and Systems Magazine, 6(1), 8-26. External link

Cappelli, A., Lodi, A., Bocchi, M., Mucci, C., Innocenti, M., De, B. C., Ciccarelli, L., Giansante, R., Deledda, A., Campi, F., Toma, M., & Guerrieri, R. (2005, February). XiSystem: A XiRisc-based SoC with a reconfigurable IO module [Paper]. IEEE International Solid-State Circuits Conference (ISSCC 2005), San Francisco, CA, United states. External link

Cappelli, A., Lodi, A., Mucci, C., Toma, M., & Campi, F. (2004, April). A dataflow control unit for C-to-configurable pipelines compilation flow [Paper]. 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), Napa, CA, United states. External link

Campi, F., Toma, M., Lodi, A., Cappelli, A., Canegallo, R., & Guerrieri, R. (2003, February). A VLIW processor with reconfigurable instruction set for embedded applications [Paper]. IEEE International Solid-State Circuits Conference (ISSCC 2003), San Francisco, CA, USA. External link

L

Lodi, A., Ciccarelli, L., Mucci, C., Giansante, R., Cappelli, A., & Toma, M. (2005, April). An embedded reconfigurable datapath for SoC [Paper]. 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), Napa, CA, United states. External link

Lodi, A., Giansante, R., Chiesa, C., Ciccarelli, L., Toma, M., & Campi, F. (2004, February). Routing architecture for multi-context FPGAs [Paper]. 12th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2004), Monterey, CA, USA. External link

Lodi, A., Ciccarelli, L., Cappelli, A., Campi, F., & Toma, M. (2003, February). Decoder-based multi-context interconnect architecture [Paper]. IEEE Computer Society Annual Symposium on VLSI: New Trends and Technologies for Vlsi Systems Design (ISVLSI 2003), Tampa, FL, United states. External link

Lodi, A., Chiesa, C., Campi, F., & Toma, M. (2003, May). A flexible LUT-based carry chain for FPGAs [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand. External link

Lodi, A., Toma, M., & Campi, F. (2003, February). A pipelined configurable gate array for embedded processors [Paper]. 11th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2003), Monterey, CA, United states. External link

Lodi, A., Toma, M., Campi, F., Cappelli, A., Canegallo, R., & Guerrieri, R. (2003). A VLIW processor with reconfigurable instruction set for embedded applications. IEEE Journal of Solid-State Circuits, 38(11), 1876-1886. External link

Lodi, A., Toma, M., & Guerrieri, R. (2002, May). Very low complexity prompted speaker verification system based on HMM-modeling [Paper]. IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP 2002), Orlando, FL, United states. External link

M

Mucci, C., Vanzolini, L., Lodi, A., Deledda, A., Guerrieri, R., Campi, F., & Toma, M. (2007, April). Implementation of AES/Rijndael on a dynamically reconfigurable architecture [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2007), Nice Acropolis, France. External link

Mucci, C., Bocchi, M., Gagliardi, P., Ciccarelli, L., Lodi, A., Toma, M., & Campi, F. (2006, May). A case-study on multimedia applications for the XiRisc reconfigurable processor [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2006), Kos, Greece. External link

Mucci, C., Chiesa, C., Lodi, A., Toma, M., & Campi, F. (2003, November). A C-based algorithm development flow for a reconfigurable processor architecture [Paper]. 5th International Symposium on System-on-Chip (SoC 2003), Tampere, Finland. External link

T

Toma, M., Lodi, A., & Guerrieri, R. (2002, September). Word endpoints detection in the presence of non-stationary noise [Paper]. 7th International Conference on Spoken Language Processing (ICSLP-INTERSPEECH 2002), Denver, Colorado, USA. External link

List generated on: Wed Feb 12 06:19:47 2025 EST