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Luinaud, T., Santiago da Silva, J., Langlois, J. M. P., & Savaria, Y. (2021, February). Design Principles for Packet Deparsers on FPGAs [Paper]. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2021) (7 pages). Available
Luinaud, T., Stimpfling, T., Santiago da Silva, J., Savaria, Y., & Langlois, J. M. P. (2020, May). Bridging the gap: FPGAs as programmable switches [Paper]. 21st IEEE International Conference on High Performance Switching and Routing (HPSR 2020) (7 pages). External link
Santiago da Silva, J. (2020). Fully Programming the Data Plane: A Hardware/Software Approach [Ph.D. thesis, Polytechnique Montréal]. Available
Santiago da Silva, J., Boyer, F.-R., Chiquette, L.-O., & Langlois, J. M. P. (2018, June). Extern objects in P4: an ROHC compressing scheme case study [Paper]. IEEE Conference on Network Softwarization (NetSoft 2018), Montréal, Québec. External link
Santiago da Silva, J., Boyer, F.-R., & Langlois, J. M. P. (2018, February). P4-compatible high-level synthesis of low latency 100 Gb/s streaming packet parsers in FPGAs [Paper]. ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2018), Monterey, California, USA. External link