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Njinowa, M. S., Bui, H. T., & Boyer, F.-R. (2010, May). Peak-to-peak jitter reduction technique for the Free-Running Period Synthesizer (FRPS) [Paper]. IEEE International Symposium on Circuits and Systems. ISCAS 2010, Paris, France. External link
Njinowa, M. S., Bui, H. T., & Boyer, F.-R. (2009, June). Design and optimization of a low complexity all-digital digital-to-analog converter [Paper]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2009), Toulouse, France. External link
