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Chebli, R., Sawan, M., El-Sankary, K., & Savaria, Y. (2010). High-voltage DMOS integrated circuits using floating-gate protection technique. Analog Integrated Circuits and Signal Processing, 62(2), 223-235. External link
Chebli, R., Sawan, M., Savaria, Y., & El-Sankary, K. (2007, May). High-voltage DMOS integrated circuits with floating gate protection technique [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2007), New Orleans, LA, USA. External link
Chouia, Y., El-Sankary, K., Saleh, A., Sawan, M., & Ghannouchi, F. M. (2004, July). 14b, 50MS/s CMOS front-end Sample and hold module dedicated to a pipelined ADC [Paper]. 47th Midwest Symposium on Circuits and Systems (MWSCAS 2004), Hiroshima. External link
Chouia, Y., El-Sankary, K., Saleh, A., Sawan, M., & Ghannouchi, F. M. (2004, December). A new technique for designing high performance front-end sample and hold circuits [Paper]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. External link
El-Sankary, K., & Sawan, M. (2007). Circuit calibration using voltage injection. (Patent no. US7187310). External link
El-Sankary, K., & Sawan, M. (2006, September). 10-B 100-Ms/S Two-Channel Time-Interleaved Pipelined Adc [Paper]. IEEE Custom Integrated Circuits Conference, San Jose, CA, USA. External link
El-Sankary, K., & Sawan, M. (2006). A background calibration technique for multibit/stage pipelined and time-interleaved ADCs. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 53(6), 448-452. External link
El-Sankary, K., & Sawan, M. (2006). High-Resolution Background Calibrated Adcs for Software-Defined Radios. Microelectronics Journal, 37(11), 1231-1240. External link
El-Sankary, K., & Sawan, M. (2004). A digital blind background capacitor mismatch calibration technique for pipelined ADC. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 51(10), 507-510. External link
El-Sankary, K., & Sawan, M. (2004, December). High Resolution Self-Calibrated Adcs for Software Defined Radios [Paper]. 16th International Conference on Microelectronics (ICM 2004), Tunis, Tunesia. External link
El-Sankary, K., & Sawan, M. (2004, May). A new digital background calibration technique for pipelined ADC [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, BC, Canada. External link
El-Sankary, K., Assi, A., & Sawan, M. (2004). New Sampling Method to Improve the Sfdr of Wide Bandwidth Adc Dedicated to Next Generation Wireless Transceiver. Journal of Circuits, Systems and Computers, 13(6), 1183-1201. External link
El-Sankary, K., & Sawan, M. (2003, December). Digital blind background capacitor mismatch calibration for pipe-lined ADC [Paper]. 46th IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2003), Cairo, Egypt. External link
El-Sankary, K., Assi, A., & Sawan, M. (2003, May). New sampling method to improve the SFDR of time-interleaved ADCs [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2003). External link
El-Sankary, K., Kassem, A., Chebli, R., & Sawan, M. (2002, January). Low-power, low voltage, 10-BIT-50MSPS pipeline ADC dedicated for front-end ultrasonic receivers [Paper]. 14th IEEE International Conference on Microelectronics, Beirut. External link
El-Sankary, K., Assi, A., & Sawan, M. (2002, November). A new time-interleaved architecture for high-speed A/D converters [Paper]. 3rd International Workshop on Digital and Computational Video, Floride, USA. External link
Qin, L., El-Sankary, K., & Sawan, M. (2006). A 1.8 V CMOS fourth-order Gm-C bandpass sigma-delta modulator dedicated to front-end ultrasonic receivers. Analog Integrated Circuits and Signal Processing, 48(2), 121-132. External link
Sawan, M., Djemouai, A., El-Sankary, K., Dang, H., Naderi, A., Savaria, Y., & Gagnon, F. (2005, June). High speed ADCs dedicated for wideband wireless receivers [Paper]. 3rd IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2005), Québec, QC, Canada. External link
