Items where Author is "Cappelli, Andrea"

C

Cappelli, A., Ciccarelli, L., Lodi, A., Toma, M., & Campi, F. (2007). Architecture for a connection block in reconfigurable gate arrays. (Patent no. US7193437). External link

Cappelli, A., Lodi, A., Bocchi, M., Mucci, C., Innocenti, M., De, B. C., Ciccarelli, L., Giansante, R., Deledda, A., Campi, F., Toma, M., & Guerrieri, R. (2005, February). XiSystem: A XiRisc-based SoC with a reconfigurable IO module [Paper]. IEEE International Solid-State Circuits Conference (ISSCC 2005), San Francisco, CA, United states. External link

Cappelli, A., Lodi, A., Mucci, C., Toma, M., & Campi, F. (2004, April). A dataflow control unit for C-to-configurable pipelines compilation flow [Paper]. 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), Napa, CA, United states. External link

Campi, F., Toma, M., Lodi, A., Cappelli, A., Canegallo, R., & Guerrieri, R. (2003, February). A VLIW processor with reconfigurable instruction set for embedded applications [Paper]. IEEE International Solid-State Circuits Conference (ISSCC 2003), San Francisco, CA, USA. External link

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Lodi, A., Mucci, C., Bocchi, M., Cappelli, A., De Dominicis, M., & Ciccarelli, L. (2006, August). A multi-context pipelined array for embedded systems [Paper]. International Conference on Field Programmable Logic and Applications (FPL 2006), Madrid, Spain. External link

Lodi, A., Ciccarelli, L., Mucci, C., Giansante, R., Cappelli, A., & Toma, M. (2005, April). An embedded reconfigurable datapath for SoC [Paper]. 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), Napa, CA, United states. External link

Lodi, A., Ciccarelli, L., Cappelli, A., Campi, F., & Toma, M. (2003, February). Decoder-based multi-context interconnect architecture [Paper]. IEEE Computer Society Annual Symposium on VLSI: New Trends and Technologies for Vlsi Systems Design (ISVLSI 2003), Tampa, FL, United states. External link

Lodi, A., Toma, M., Campi, F., Cappelli, A., Canegallo, R., & Guerrieri, R. (2003). A VLIW processor with reconfigurable instruction set for embedded applications. IEEE Journal of Solid-State Circuits, 38(11), 1876-1886. External link