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Anwar, H. (2016). A Probabilistically Analyzable Cache to Estimate Timing Bounds [Master's thesis, École Polytechnique de Montréal]. Available
Anwar, H., Jafri, S., Dytckov, S., Daneshtalab, M., Ebrahimi, M., Plosila, J., Beltrame, G., & Tenhunen, H. (2014, June). Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures [Paper]. 2nd ACM International Workshop on Manycore Embedded Systems (MES 2014), Minneapolis, MN, USA. External link
