![]() | Up a level |
Zarrabi, H., Al-Khalili, A. J., & Savaria, Y. (2015). Design intelligence for interconnection realization in power-managed SoCs. In Computational Intelligence in Digital and Network Designs and Applications (69-96). External link
Zarrabi, H., Al-Khalili, A. J., & Savaria, Y. (2011, December). Activity management in battery-powered embedded systems: A case study of ZigBee® WSN [Paper]. 18th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2011), Beirut, Lebanon. External link
Zarrabi, H., Al-Khalili, A. J., & Savaria, Y. (2010, May). An interconnect-aware Dynamic Voltage Scaling scheme for DSM VLSI [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2010), Paris, France. External link
Zarreabi, H., Al-Khalili, A. J., & Savaria, Y. (2009, December). Estimation of energy performance in computing platforms [Paper]. 16th IEEE International Conference on Electronics, Circuits and Systems, Yasmine Hammamet, Tunisia. External link
Zarrabi, H., Al-Khalili, A. J., & Savaria, Y. (2009, May). An interconnect-aware delay model for dynamic voltage scaling in nm technologies [Paper]. 19th ACM Great Lakes Symposium on VLSI, Boston, MA, United states. External link
Zarrabi, H., Zilic, Z., Al-Khalili, A. J., & Savaria, Y. (2007, August). A methodology for parallel synthesis of zero skew differential clock distribution networks [Paper]. IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007), Montreal, QC, Canada. External link