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Anane, A., Aboulhamid, E. M., Vachon, J., & Savaria, Y. (2008, May). Modeling and simulation of complex heterogeneous systems [Paper]. IEEE International Symposium on Circuits and Systems (ISCAS 2008), Seattle, WA, United states. External link
Bouchebaba, Y., Girodias, B., Nicolescu, G., Coelho, F., & Aboulhamid, E. M. (2004, September). Buffer and register allocation for memory space optimization [Paper]. IEEE 15th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2004), Galveston, Texas. Published in Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 49(1). External link
Bouchhima, F., Nicolescu, G., Aboulhamid, E. M., & Abid, M. (2007). Generic Discrete-Continuous Simulation Model for Accurate Validation in Heterogeneous Systems Design. Microelectronics Journal, 38(6-7), 805-815. External link
Bouchhima, F., Briere, M., Nicolescu, G., Abid, M., & Aboulhamid, E. M. (2006, September). A SystemC/Simulink co-simulation framework for continuous/discrete-events simulation [Paper]. IEEE International Behavioral Modeling and Simulation Workshop, San Jose, CA, USA. External link
Bois, G., Filion, L., Tsikhanovich, A., & Aboulhamid, E. M. (2004). Modélisation, raffinement et programmation orientée objet avec SystemC. In Spécification et validation des systèmes monopuces (pp. 171-208). External link
Benny, O., Rondonneau, M., Chevalier, J., Bois, G., Aboulhamid, E. M., & Boyer, F.-R. (2004, March). SoC software refinement approach for a systemC platform [Paper]. Design & Verification Conference & Exhibition (DVCon 2004), San Jose, California. Unavailable
Boyer, F.-R., Aboulhamid, E. M., Savaria, Y., & Boyer, M. (2001). Optimal Design of Synchronous Circuits Using Software Pipelining Techniques. ACM Transactions on Design Automation of Electronic Systems, 6(4), 516-532. External link
Boyer, F.-R., Aboulhamid, E. M., & Savaria, Y. (2000, January). Efficient verification method for a class of multi-phase sequential circuits [Paper]. 7th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2000). External link
Chureau, A., Savaria, Y., & Aboulhamid, E. M. (2005, March). The Role of Model-Level Transactors and Uml in Functional Prototyping of Systems-on-Chip: a Software-Radio Application [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2005), Munich, Germany. External link
Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. (2005). Scheduling and Optimal Register Placement for Synchronous Circuits Derived Using Software Pipelining Techniques. ACM Transactions on Design Automation of Electronic Systems, 10(2), 187-204. External link
Chureau, A., Savaria, Y., & Aboulhamid, E. M. (2004, July). Interface-based design of systems-on-chip using UML-RT [Paper]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. External link
Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. Minimizing the Number of Phases in Clocked Digital Designs Derived Using Modulo Scheduling Techniques [Paper]. Icm 2002: 14th International Conference on Microelectronics. External link
Chabini, N., Aboulhamid, E. M., & Savaria, Y. (2001, January). Fast method for determining an efficient bound on the optimal solution of the cost-to-time ratio problem [Paper]. 5th World Multiconference on Systemics, Cybernetics and Informatics (SCI 2001) and 7th International Conference in Information Systems Analysis and Synthesis (ISAS 2001), Orlando, Floride. Unavailable
Chabini, N., Aboulhamid, E. M., & Savaria, Y. (2001, April). Reducing register and phase requirements for synchronous circuits derived using software pipelining techniques [Paper]. IEEE Computer Society Workshop on VLSI (WVLSI 2001), Orlando, FL, United states. External link
Chabini, N., Bennour, I. E., Aboulhamid, E. M., & Savaria, Y. (1998, January). Static method for system performance estimation [Paper]. 10th International Conference on Microelectronics. External link
Girodias, B., Gheorghe, L., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Langevin, M., & Paulin, P. (2010, June). Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip [Paper]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, VA, USA. External link
Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Paulin, P., & Lavigueur, B. (2009). Multiprocessor, multithreading and memory optimization for on-chip multimedia applications. Journal of Signal Processing Systems, 57(2), 263-283. External link
Gorse, N., Belanger, P., Chureau, A., Aboulhamid, E. M., & Savaria, Y. (2007). A High-Level Requirements Engineering Methodology for Electronic System-Level Design. Computers & Electrical Engineering, 33(4), 249-268. External link
Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Paulin, P., & Lavigueur, B. (2006, June). Application-level memory optimization for MPSoC [Paper]. 17th IEEE International Workshop on Rapid System Prototyping, Chania, Crete, Greece. External link
Gorse, N., Aboulhamid, E. M., & Savaria, Y. (2004, July). Consistency validation of high-level requirements [Paper]. 4th International Workshop on System on Chip for Real Time Applications (IWSOC 2004), Banff, AB, Canada. External link
Gorse, N., Metzger, M., Lapalme, J., Aboulhamid, E. M., Savaria, Y., & Nicolescu, G. (2004, December). Enhancing ESys.Net with a semi-formal verification layer [Paper]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. External link
Heneault, Y., Filion, L., Bois, G., & Aboulhamid, E. M. A Fast Hardware Co-Specification and Co-Simulation Methodology Integrated in a H/S Co-Design Platform [Paper]. 13th International Conference on Microelectronics (ICM 2001). External link
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., & Rousseau, F. (2007). Separating Modeling and Simulation Aspects in Hardware/Software Framework-Based Modeling Languages. Arabian Journal for Science and Engineering, 32(2C), 41-60. External link
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (2004, February). [dot]Net framework - A solution for the next generation tools for system-level modeling and simulation [Paper]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2004), Paris, France. External link
Lemire, J. F., Aboulhamid, E. M., Savaria, Y., Bois, G., & Baron, A. (2003, February). Implementing e assertion checkers from an SDL executable specifications [Paper]. DVCON, San José, USA. Unavailable
Li, J., Boyer, F.-R., & Aboulhamid, E. M. (2002, July). Retargetable C Compiler for Network Processors [Paper]. 6th World Multiconference on Systemics, Cybernetics and Informatics, Orlando, Florida. Unavailable
Nicolescu, B., Gorse, N., Savaria, Y., Aboulhamid, E. M., & Velazco, R. (2004, September). Validating a dynamic signature monitoring approach using the LTL model checking technique [Paper]. Workshop on Radiation Effects on Components and Systems (RADECS 2004), Madrid, Espagne. Unavailable
Regimbal, S., Lemire, J.-F., Savaria, Y., Bois, G., Aboulhamid, E. M., & Baron, A. (2003, June). Automating functional coverage analysis based on an executable specification [Paper]. 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications. External link
