Documents dont l'auteur est "Aboulhamid, E. M."

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Nombre de documents: 28

2010

Girodias, B., Gheorghe, L., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Langevin, M., & Paulin, P. (juin 2010). Combining memory optimization with mapping of multimedia applications for multi-processors system-on-chip [Communication écrite]. 21st IEEE International Symposium on Rapid System Prototyping (RSP 2010), Fairfax, VA, USA. Lien externe

2009

Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Paulin, P., & Lavigueur, B. (2009). Multiprocessor, multithreading and memory optimization for on-chip multimedia applications. Journal of Signal Processing Systems, 57(2), 263-283. Lien externe

2008

Anane, A., Aboulhamid, E. M., Vachon, J., & Savaria, Y. (mai 2008). Modeling and simulation of complex heterogeneous systems [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2008), Seattle, WA, United states. Lien externe

2007

Bouchebaba, Y., Girodias, B., Nicolescu, G., Coelho, F., & Aboulhamid, E. M. (septembre 2004). Buffer and register allocation for memory space optimization [Communication écrite]. IEEE 15th International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2004), Galveston, Texas. Publié dans Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology, 49(1). Lien externe

Bouchhima, F., Nicolescu, G., Aboulhamid, E. M., & Abid, M. (2007). Generic Discrete-Continuous Simulation Model for Accurate Validation in Heterogeneous Systems Design. Microelectronics Journal, 38(6-7), 805-815. Lien externe

Gorse, N., Belanger, P., Chureau, A., Aboulhamid, E. M., & Savaria, Y. (2007). A High-Level Requirements Engineering Methodology for Electronic System-Level Design. Computers & Electrical Engineering, 33(4), 249-268. Lien externe

Lapalme, J., Aboulhamid, E. M., Nicolescu, G., & Rousseau, F. (2007). Separating Modeling and Simulation Aspects in Hardware/Software Framework-Based Modeling Languages. Arabian Journal for Science and Engineering, 32(2C), 41-60. Lien externe

2006

Girodias, B., Bouchebaba, Y., Nicolescu, G., Aboulhamid, E. M., Paulin, P., & Lavigueur, B. (juin 2006). Application-level memory optimization for MPSoC [Communication écrite]. 17th IEEE International Workshop on Rapid System Prototyping, Chania, Crete, Greece. Lien externe

Bouchhima, F., Briere, M., Nicolescu, G., Abid, M., & Aboulhamid, E. M. (septembre 2006). A SystemC/Simulink co-simulation framework for continuous/discrete-events simulation [Communication écrite]. IEEE International Behavioral Modeling and Simulation Workshop, San Jose, CA, USA. Lien externe

2005

Chureau, A., Savaria, Y., & Aboulhamid, E. M. (mars 2005). The Role of Model-Level Transactors and Uml in Functional Prototyping of Systems-on-Chip: a Software-Radio Application [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2005), Munich, Germany. Lien externe

Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. (2005). Scheduling and Optimal Register Placement for Synchronous Circuits Derived Using Software Pipelining Techniques. ACM Transactions on Design Automation of Electronic Systems, 10(2), 187-204. Lien externe

2004

Gorse, N., Aboulhamid, E. M., & Savaria, Y. (juillet 2004). Consistency validation of high-level requirements [Communication écrite]. 4th International Workshop on System on Chip for Real Time Applications (IWSOC 2004), Banff, AB, Canada. Lien externe

Gorse, N., Metzger, M., Lapalme, J., Aboulhamid, E. M., Savaria, Y., & Nicolescu, G. (décembre 2004). Enhancing ESys.Net with a semi-formal verification layer [Communication écrite]. 16th International Conference on Microelectronics (ICM 2004), Tunisie. Lien externe

Chureau, A., Savaria, Y., & Aboulhamid, E. M. (juillet 2004). Interface-based design of systems-on-chip using UML-RT [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe

Bois, G., Filion, L., Tsikhanovich, A., & Aboulhamid, E. M. (2004). Modélisation, raffinement et programmation orientée objet avec SystemC. Dans Spécification et validation des systèmes monopuces (p. 171-208). Lien externe

Benny, O., Rondonneau, M., Chevalier, J., Bois, G., Aboulhamid, E. M., & Boyer, F.-R. (mars 2004). SoC software refinement approach for a systemC platform [Communication écrite]. Design & Verification Conference & Exhibition (DVCon 2004), San Jose, California. Non disponible

Nicolescu, B., Gorse, N., Savaria, Y., Aboulhamid, E. M., & Velazco, R. (septembre 2004). Validating a dynamic signature monitoring approach using the LTL model checking technique [Communication écrite]. Workshop on Radiation Effects on Components and Systems (RADECS 2004), Madrid, Espagne. Non disponible

Lapalme, J., Aboulhamid, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (février 2004). [dot]Net framework - A solution for the next generation tools for system-level modeling and simulation [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2004), Paris, France. Lien externe

2003

Regimbal, S., Lemire, J.-F., Savaria, Y., Bois, G., Aboulhamid, E. M., & Baron, A. (juin 2003). Automating functional coverage analysis based on an executable specification [Communication écrite]. 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications. Lien externe

Lemire, J. F., Aboulhamid, E. M., Savaria, Y., Bois, G., & Baron, A. (février 2003). Implementing e assertion checkers from an SDL executable specifications [Communication écrite]. DVCON, San José, USA. Non disponible

2002

Chabini, N., Aboulhamid, E. M., Chabini, I., & Savaria, Y. Minimizing the Number of Phases in Clocked Digital Designs Derived Using Modulo Scheduling Techniques [Communication écrite]. Icm 2002: 14th International Conference on Microelectronics. Lien externe

Li, J., Boyer, F.-R., & Aboulhamid, E. M. (juillet 2002). Retargetable C Compiler for Network Processors [Communication écrite]. 6th World Multiconference on Systemics, Cybernetics and Informatics, Orlando, Florida. Non disponible

2001

Heneault, Y., Filion, L., Bois, G., & Aboulhamid, E. M. A Fast Hardware Co-Specification and Co-Simulation Methodology Integrated in a H/S Co-Design Platform [Communication écrite]. 13th International Conference on Microelectronics (ICM 2001). Lien externe

Chabini, N., Aboulhamid, E. M., & Savaria, Y. (janvier 2001). Fast method for determining an efficient bound on the optimal solution of the cost-to-time ratio problem [Communication écrite]. 5th World Multiconference on Systemics, Cybernetics and Informatics (SCI 2001) and 7th International Conference in Information Systems Analysis and Synthesis (ISAS 2001), Orlando, Floride. Non disponible

Boyer, F.-R., Aboulhamid, E. M., Savaria, Y., & Boyer, M. (2001). Optimal Design of Synchronous Circuits Using Software Pipelining Techniques. ACM Transactions on Design Automation of Electronic Systems, 6(4), 516-532. Lien externe

Chabini, N., Aboulhamid, E. M., & Savaria, Y. (avril 2001). Reducing register and phase requirements for synchronous circuits derived using software pipelining techniques [Communication écrite]. IEEE Computer Society Workshop on VLSI (WVLSI 2001), Orlando, FL, United states. Lien externe

2000

Boyer, F.-R., Aboulhamid, E. M., & Savaria, Y. (janvier 2000). Efficient verification method for a class of multi-phase sequential circuits [Communication écrite]. 7th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2000). Lien externe

1998

Chabini, N., Bennour, I. E., Aboulhamid, E. M., & Savaria, Y. (janvier 1998). Static method for system performance estimation [Communication écrite]. 10th International Conference on Microelectronics. Lien externe

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