Scalable Architectures for Programmable, Adaptive and Hierarchical Traffic Management in Telecommunication Networks

The current trend in network infrastructure is shifting towards achieving high network programmability. In response to this trend, the Software-Defined Networking (SDN) approach emerged, which effectively decouples the control and data forwarding planes. Consequently, the data plane necessitates a fully programmable architecture capable of efficiently processing and forwarding packets at line rate. However, the existing data plane devices face limitations as they often rely on fixed-function or reconfigurable Traffic Managers (TMs). These TMs struggle to provide efficient and adaptable Quality of Service (QoS) to network users and traffic. Furthermore, the absence of programmable abstractions for TMs hinders the complete replacement of conventional network infrastructure by the SDN approach. A truly programmable TM should possess the flexibility to support a wide range of scheduling algorithms while adhering to the timing constraints inherent in contemporary hardware network equipment. In response to this demand for QoS in programmable network environments, this thesis introduces the Dynamic-Ranking Push-In-First-Out (DR-PIFO) TM. Designed to align with SDN principles, it offers a hierarchical, scalable, and programmable solution for managing network traffic. The DR-PIFO TM’s development journey encompasses several pivotal phases. It begins with the creation of an innovative single-queue packet scheduler model. This algorithmic framework is highly expressive, accommodating various scheduling algorithms, and it allows real-time priority updates. It also includes error detection mechanisms to mitigate issues associated with strict priority scheduling. The effectiveness of the DR-PIFO algorithmic model is demonstrated through challenging case studies and realistic datacenter evaluations. Afterward, the hardware implementation of the DR-PIFO single-queue model, implemented using the TSMC’s 65nm CMOS technology, showcases impressive performance with low area overhead, closely mirroring the algorithmic model’s superior behavior. After proposing the DR-PIFO model, the single-queue DR-PIFO model is the foundation for constructing a novel hierarchical, scalable, and programmable DR-PIFO Traffic Manager. Integrated into programmable switches, this TM leverages the power of a network programming language, P4, for configuration. Exhaustive testing across a diverse set of over 20 scheduling policies and hierarchical case studies confirms the TM’s programmability, identifying the necessary language constructs and components within P4 for effective policy implementation.