Design and implementation of high sampling rate programmable FIR filters in FPGAs

J. M. Pierre Langlois

Paper (2006)

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Additional Information:	Nom historique du département: Département de génie informatique
Department:	Department of Computer Engineering and Software Engineering
PolyPublie URL:	https://publications.polymtl.ca/22877/
Conference Title:	4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006)
Conference Location:	Gatineau, Que., Canada
Conference Date(s):	2006-06-18 - 2006-06-21
Publisher:	IEEE
DOI:	10.1109/newcas.2006.250949
Official URL:	https://doi.org/10.1109/newcas.2006.250949
Date Deposited:	18 Apr 2023 15:17
Last Modified:	05 Apr 2024 11:07

Cite in APA 7:	Langlois, J. M. P. (2006, June). Design and implementation of high sampling rate programmable FIR filters in FPGAs [Paper]. 4th IEEE International Northeast Workshop on Circuits and Systems (NEWCAS 2006), Gatineau, Que., Canada. https://doi.org/10.1109/newcas.2006.250949
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