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Benyoussef, M., Thibeault, C., & Savaria, Y. (mai 2019). A Prediction Model for Implementing DVS in Single-Rail Bundled-Data Handshake-Free Asynchronous Circuits [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2019), Sapporo, Japan (5 pages). Lien externe
Darvishi, M., Audet, Y., Blaquiere, Y., Thibeault, C., & Pichette, S. (2019). On the susceptibility of SRAM-Based FPGA routing network to delay changes induced by ionizing radiation. IEEE Transactions on Nuclear Science, 66(3), 643-654. Lien externe
Fiorentino, M., Thibeault, C., Savaria, Y., Gagnon, F., Awad, T., Morrissey, D., & Laurence, M. (mai 2019). AnARM: a 28nm energy efficient ARM processor based on Octasic asynchronous technology [Communication écrite]. 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2019), Hirosaki, Japan. Lien externe
