Documents publiés en "2018"

Département de génie électrique

Fradj, B., Wolff, B., Bélanger, N., & Savaria, Y. (mai 2018). Implementation of a cache-based IPv6 lookup system with hashing [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2018), Florence, Italy (4 pages). Lien externe

Stimpfling, T., Langlois, J. M. P., Bélanger, N., & Savaria, Y. (mai 2018). A low-latency memory-efficient IPv6 lookup engine implemented on FPGA using high-level synthesis [Communication écrite]. 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2018), Washington, D.C.. Lien externe

Wolff, B., Fradj, B., Bélanger, N., & Savaria, Y. (août 2018). Extending a CPU Cache for Efficient IPv6 Lookup [Communication écrite]. 61st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2018), Windsor, ON, Canada. Lien externe

Département de génie informatique et génie logiciel

Stimpfling, T., Langlois, J. M. P., Bélanger, N., & Savaria, Y. (mai 2018). A low-latency memory-efficient IPv6 lookup engine implemented on FPGA using high-level synthesis [Communication écrite]. 18th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2018), Washington, D.C.. Lien externe