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Berrima, S., Blaquière, Y., & Savaria, Y. (mai 2017). A multi-measurements RO-TDC implemented in a Xilinx field programmable gate array [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2017), Baltimore, MD (4 pages). Lien externe
Berrima, S., Blaquiere, Y., & Savaria, Y. (août 2017). Sub-ps resolution programmable delays implemented in a Xilinx FPGA [Communication écrite]. 60th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2017), Boston, MA. Lien externe