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Bui, H. T., & Savaria, Y. (2008). Design of a High-Speed Differential Frequency-to-Voltage Converter and Its Application in a 5-Ghz Frequency-Locked Loop. IEEE Transactions on Circuits and Systems I: Regular Papers, 55(3), 766-774. Lien externe
Pontikakis, B., Bui, H. T., Boyer, F.-R., & Savaria, Y. (juin 2008). A novel phase-locked loop (PLL) architecture without an analog loop filter for better integration in ultra-deep submicron SoCs [Communication écrite]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2008). Lien externe
