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Bergeron, E., Feeley, M., & David, J. P. (mars 2008). Hardware JIT compilation for off-the-shelf dynamically reconfigurable FPGAs [Communication écrite]. 17th International Conference on Compiler Construction (CC 2008), Budapest, Hungary. Lien externe
Bergeron, E., Feeley, M., Daigneault, M.-A., & David, J. P. (juin 2008). Using dynamic reconfiguration to implement high-resolution programmable Delays on an FPGA [Communication écrite]. Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference (NEWCAS-TAISA 2008), Montréal, Québec. Lien externe
