Documents publiés en "2004"

Département de génie électrique

Bui, H. T., & Savaria, Y. (mai 2004). Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detector [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2004), Vancouver, BC, Canada. Lien externe

Bui, H. T., & Savaria, Y. (juillet 2004). 10 GHz PLL using active shunt-peaked MCML gates and improved frequency acquisition XOR phase detector in 0.18 mu m CMOS [Communication écrite]. 4th IEEE International Workshop on System-on-Chip for Real-Time Applications, Banff, Alta., Canada. Lien externe