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Benny, O., Rondonneau, M., Chevalier, J., Bois, G., Aboulhamid, E. M., & Boyer, F.-R. (mars 2004). SoC software refinement approach for a systemC platform [Communication écrite]. Design & Verification Conference & Exhibition (DVCon 2004), San Jose, California. Non disponible
Boyer, F.-R., Epassa, H. G., Pontikakis, B., Savaria, Y., & Ling, W. (juin 2004). A variable period clock synthesis (VPCS) architecture for next-generation power-aware SoC applications [Communication écrite]. 2nd annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2004), Montréal, Québec. Lien externe
Chevalier, J., Benny, O., Rondonneau, E. M., Bois, G., & Boyer, F.-R. (2004). SPACE : a hardware/software system C modeling platform including and RTOS. Dans Languages for System Specification : Selected Contributions on UML, SystemC, System Verilog, Mixed-Signal Systems, and Property Specification from FDL'03 (91-104). Lien externe
Lapalme, J., Aboulhamed, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (juin 2004). Esys.net: A New Solution for Embedded Systems Modeling and Simulation [Communication écrite]. ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2004), Washington, D.C.. Publié dans ACM Sigplan Notices, 39(7). Lien externe
Lapalme, J., Aboulhamid, E. M., Nicolescu, G., Charest, L., Boyer, F.-R., David, J. P., & Bois, G. (février 2004). [dot]Net framework - A solution for the next generation tools for system-level modeling and simulation [Communication écrite]. Design, Automation and Test in Europe Conference and Exhibition (DATE 2004), Paris, France. Lien externe
