Documents publiés en "2003"

Département de génie électrique

Lu, M. (2003). Defect tolerance methods and thermally induced skew analysis for wafer scale integration [Mémoire de maîtrise, École Polytechnique de Montréal]. Disponible

Lu, M., Savaria, Y., Qiu, B., & Taillefer, J. (novembre 2003). IEEE 1149.1 based defect and fault tolerant scan chain for wafer scale integration [Communication écrite]. 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2003), Boston, MA, United states. Lien externe