Documents publiés en "2003"

C

Campi, F., Toma, M., Lodi, A., Cappelli, A., Canegallo, R., & Guerrieri, R. (février 2003). A VLIW processor with reconfigurable instruction set for embedded applications [Communication écrite]. IEEE International Solid-State Circuits Conference (ISSCC 2003), San Francisco, CA, USA. Lien externe

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Fischetti, M., & Lodi, A. (2003). Local branching. Mathematical Programming, 98(1-3), 23-47. Lien externe

Focacci, F., Laburthe, F., & Lodi, A. (2003). Local search and constraint programming. Dans Glover, F., & Kochenberger, G. A. (édit.), Handbook of metaheuristics (Vol. 57, 369-403). Lien externe

L

Letchford, A. N., & Lodi, A. (2003). Primal separation algorithms. 4OR, 1(3), 209-224. Lien externe

Lodi, A. (août 2003). Local branching: a tutorial [Communication écrite]. 5th Metaheuristics International Conference (MIC 2003), Kyoto, Japan. Non disponible

Lodi, A., & Monaci, M. (2003). Integer linear programming models for 2-staged two-dimensional Knapsack problems. Mathematical Programming, 94(2-3), 257-278. Lien externe

Lodi, A., Chiesa, C., Campi, F., & Toma, M. (mai 2003). A flexible LUT-based carry chain for FPGAs [Communication écrite]. IEEE International Symposium on Circuits and Systems (ISCAS 2003), Bangkok, Thailand. Lien externe

Lodi, A., Ciccarelli, L., Cappelli, A., Campi, F., & Toma, M. (2003). Decoder-based interconnect structure for multi-context FPGAs. Electronics Letters, 39(4), 362-364. Lien externe

Lodi, A., Ciccarelli, L., Cappelli, A., Campi, F., & Toma, M. (février 2003). Decoder-based multi-context interconnect architecture [Communication écrite]. IEEE Computer Society Annual Symposium on VLSI: New Trends and Technologies for Vlsi Systems Design (ISVLSI 2003), Tampa, FL, United states. Lien externe

Lodi, A., Milano, M., & Rousseau, L.-M. (septembre 2003). Discrepancy Additive Bounding for the All different Constraint [Communication écrite]. 9th International Conference on Principles and Practice of Constraint Programming (CP 2003), Kinsale, Ireland. Lien externe

Lodi, A., Toma, M., & Campi, F. (février 2003). A pipelined configurable gate array for embedded processors [Communication écrite]. 11th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA 2003), Monterey, CA, United states. Lien externe

Lodi, A., Toma, M., Campi, F., Cappelli, A., Canegallo, R., & Guerrieri, R. (2003). A VLIW processor with reconfigurable instruction set for embedded applications. IEEE Journal of Solid-State Circuits, 38(11), 1876-1886. Lien externe

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Mucci, C., Chiesa, C., Lodi, A., Toma, M., & Campi, F. (novembre 2003). A C-based algorithm development flow for a reconfigurable processor architecture [Communication écrite]. 5th International Symposium on System-on-Chip (SoC 2003), Tampere, Finland. Lien externe