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Chabini, N., & Savaria, Y. (janvier 2001). Methods for optimizating register placement in synchronous circuits derived using software pipelining techniques [Communication écrite]. 14th International Symposium on System Synthesis (ISSS 2001), Montréal, Québec. Lien externe
Chabini, N., Aboulhamid, E. M., & Savaria, Y. (août 2001). Efficient Methods for Reducing Register and Phase Requirements for Synchronous Circuits Derived Using Software Pipelining Techniques [Communication écrite]. European Conference on Circuit Theory and Design (ECCTD 2001), Espoo, Finland. Non disponible
Chabini, N., Aboulhamid, E. M., & Savaria, Y. (janvier 2001). Minimizing registe requirements for synchronous circuits derived using software pipelining techniques [Communication écrite]. 13th International Conference on Microelectronics (ICM 2001), Rabat, Maroc. Lien externe
Chabini, N., Aboulhamid, E. M., & Savaria, Y. (avril 2001). Reducing register and phase requirements for synchronous circuits derived using software pipelining techniques [Communication écrite]. IEEE Computer Society Workshop on VLSI (WVLSI 2001), Orlando, FL, United states. Lien externe
Chabini, N., Aboulhamid, M., & Savaria, Y. (janvier 2001). Determining schedules for reducing power consuption using mulyiple supply voltages [Communication écrite]. International Conference on Computer Design (ICCD 2001), Austin, Texas. Lien externe
