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Bois, G., & Cerny, E. (1996). Efficient generation of diagonal constraints for 2-D mask compaction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 15(9), 1119-1126. Lien externe
Lejmi, S., Bois, G., & Savaria, Y. (janvier 1996). On the effects of retiming applied to self-checking sequential circuit [Communication écrite]. 2nd IEEE On-Line Testing Workshop, Biarritz. Non disponible
Savaria, Y., Bois, G., Popovic, P., & Wayne, A. Computational acceleration methodologies: advantages of reconfigurable acceleration subsystems [Communication écrite]. High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic. Lien externe
